Low power combinational circuit based on Pseudo NMOS logic
نویسندگان
چکیده
Different logic families have been proposed from several years to improve the performance of the high speed circuits. Mostly used logic family is CMOS which requires equal number of nMOS and pMOS transistor but in some application it may be required to reduce the area. Pseudo nMOS logic is one of the alternative for that .In this paper, NOR-XOR, NAND-XOR and other combinational circuit using pseudo NMOS logic is proposed. The performance of the circuits is measured in terms of power consumption, delay and power delay product and the results are compared with existing standard pseudo nMOS logic circuit for different logic functions. All the circuits are simulated using TSpice on 180nm CMOS technology.
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